1. Field of the Invention
Embodiments of the present invention relate generally to a method of barrier layer formation.
2. Description of the Related Art
Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit densities. The demand for greater circuit densities necessitates a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e.g., sub-micron dimensions), the materials used to fabricate such components contribute to the electrical performance thereof. For example, low resistivity metal interconnects (e.g., aluminum (Al) and copper (Cu)) provide conductive paths between the components on integrated circuits.
Referring to FIG. 1, the metal interconnects 2 are typically electrically isolated from each other by a bulk insulating material 4. When the distance between adjacent metal interconnects 2 and/or the thickness of the bulk insulating material 4 has sub-micron dimensions, capacitive coupling occurs between such interconnects 2. Capacitive coupling between adjacent metal interconnects 2 may cause cross-talk and/or resistance-capacitance (RC) delay, which degrades the overall performance of the integrated circuit.
In order to minimize capacitive coupling between adjacent metal interconnects, low dielectric constant bulk insulating materials 4 (e.g., dielectric constants less than about 3.5) are used. Examples of low dielectric constant bulk insulating materials include silicon dioxide (SiO2), silicate glass and organosilicate glass, among others.
In addition, a barrier layer 6 often separates the metal interconnects 2 from the bulk insulating material 4. The barrier layer 6 minimizes the diffusion of the metal from the metal interconnects 2 into the bulk insulating material 4. Diffusion of the metal from the metal interconnects 2 into the bulk insulating material 4 is undesirable because such diffusion can affect the electrical performance of the integrated circuit (e.g., cross-talk and/or RC delay) or render it inoperable. Examples of barrier materials include refractory metals such as titanium (Ti), tantalum (Ta) and tungsten (W), among others and refractory metal nitrides such as titanium nitride (TiN), tantalum.nitride (TaN) and tungsten nitride (WN), among others.
Barrier materials are typically deposited using physical vapor deposition (PVD) techniques and/or chemical vapor deposition (CVD) techniques. Such techniques deposit the barrier material on all surfaces of the interconnect structure including the metal interconnect 2 and the insulating material 4. However, when the dimensions of the interconnect structures are sub-quarter micron, deposition of barrier material on the metal interconnects 2 tends to increase the resistivity of the interconnect structure which may degrade the electrical properties of the device.
Thus, a need exists for a method to selectively deposit a barrier layer on a dielectric material.